59 low inductance capacitors introduction the signal integrity characteristics of a power delivery network (pdn) are becoming critical aspects of board level and semiconductor package designs due to higher operating frequencies, larger power demands, and the ever shrinking lower and upper voltage limits around low operating voltages. these power system challenges are coming from mainstream designs with operating frequencies of 300mhz or greater, modest ics with power demand of 15 watts or more, and operating voltages below 3 volts. the classic pdn topology is comprised of a series of capacitor stages. figure 1 is an example of this architecture with multiple capacitor stages. an ideal capacitor can transfer all its stored energy to a load instantly. a real capacitor has parasitics that prevent instantaneous transfer of a capacitors stored energy. the true nature of a capacitor can be modeled as an rlc equivalent circuit. for most simulation purposes, it is possible to model the characteristics of a real capacitor with one capacitor, one resistor, and one inductor. the rlc values in this model are commonly referred to as equivalent series capacitance (esc), equivalent series resistance (esr), and equivalent series inductance (esl). the esl of a capacitor determines the speed of energy transfer to a load. the lower the esl of a capacitor, the faster that energy can be transferred to a load. historically, there has been a tradeoff between energy storage (capacitance) and inductance (speed of energy delivery). low esl devices typically have low capacitance. likewise, higher capacitance devices typically have higher esls. this tradeoff between esl (speed of energy delivery) and capacitance (energy storage) drives the pdn design topology that places the fastest low esl capacitors as close to the load as possible. low inductance mlccs are found on semiconductor packages and on boards as close as possible to the load. low inductance chip capacitors the key physical characteristic determining equivalent series inductance (esl) of a capacitor is the size of the current loop it creates. the smaller the current loop, the lower the esl. a standard surface mount mlcc is rectangular in shape with electrical terminations on its shorter sides. a low inductance chip capacitor (licc) sometimes referred to as reverse geometry capacitor (rgc) has its terminations on the longer side of its rectangular shape. when the distance between terminations is reduced, the size of the current loop is reduced. since the size of the current loop is the primary driver of inductance, an 0306 with a smaller current loop has significantly lower esl then an 0603. the reduction in esl varies by eia size, however, esl is typically reduced 60% or more with an licc versus a standard mlcc. interdigitated capacitors the size of a current loop has the greatest impact on the esl characteristics of a surface mount capacitor. there is a secondary method for decreasing the esl of a capacitor. this secondary method uses adjacent opposing current loops to reduce esl. the interdigitated capacitor (idc) utilizes both primary and secondary methods of reducing inductance. the idc architecture shrinks the distance between terminations to minimize the current loop size, then further reduces inductance by creating adjacent opposing current loops. an idc is one single capacitor with an internal structure that has been optimized for low esl. similar to standard mlcc versus liccs, the reduction in esl varies by eia case size. typically, for the same eia size, an idc delivers an esl that is at least 80% lower than an mlcc. vr slowest capacitors fastest capacitors low inductance decoupling capacitors semiconductor product bulk board-level package-level die-level figure 1 classic power delivery network (pdn) architecture
60 low inductance capacitors introduction land grid array (lga) capacitors land grid array (lga) capacitors are based on the first low esl mlcc technology created to specifically address the design needs of current day power delivery networks (pdns). this is the 3rd low inductance capacitor technology developed by avx. lga technology provides engineers with new options. the lga internal structure and manufacturing technology eliminates the historic need for a device to be physically small to create small current loops to minimize inductance. the first family of lga products are 2 terminal devices. a 2 terminal 0306 lga delivers esl performance that is equal to or better than an 0306 8 terminal idc. the 2 terminal 0805 lga delivers esl performance that approaches the 0508 8 terminal idc. new designs that would have used 8 terminal idcs are moving to 2 terminal lgas because the layout is easier for a 2 terminal device and manufacturing yield is better for a 2 terminal lga versus an 8 terminal idc. lga technology is also used in a 4 terminal family of products that avx is sampling and will formerly introduce in 2008. beyond 2008, there are new multi-terminal lga product families that will provide even more attractive options for pdn designers. low inductance chip arrays (lica ? ) the lica ? product family is the result of a joint development effort between avx and ibm to develop a high performance mlcc family of decoupling capacitors. lica was introduced in the 1980s and remains the leading choice of designers in high performance semiconductor packages and high reliability board level decoupling applications. lica ? products are used in 99.999% uptime semiconductor package applications on both ceramic and organic substrates. the c4 solder ball termination option is the perfect compliment to flip-chip packaging technology. mainframe class cpus, ultimate performance multi-chip modules, and communications systems that must have the reliability of 5 9s use lica ? . lica ? products with either sn/pb or pb-free solder balls are used for decoupling in high reliability military and aerospace applications. these lica ? devices are used for decoupling of large pin count fpgas, asics, cpus, and other high power ics with low operating voltages. when high reliability decoupling applications require the very lowest esl capacitors, lica ? products are the best option. figure 2 mlcc, licc, idc, and lga technologies deliver different levels of equivalent series inductance (esl). 470 nf 0306 impedance comparison 0.001 0.01 0.1 1 1 10 100 1000 frequency (mhz) impedance (ohms) 0306 2t-lga 0306 licc 0306 8t-idc 0603 mlcc
61 general description the key physical characteristic determining equivalent series inductance (esl) of a capacitor is the size of the current loop it creates. the smaller the current loop, the lower the esl. a standard surface mount mlcc is rectangular in shape with electrical terminations on its shorter sides. a low inductance chip capacitor (licc) sometimes referred to as reverse geometry capacitor (rgc) has its terminations on the longer sides of its rectangular shape. the image on the right shows the termination differences between an mlcc and an licc. when the distance between terminations is reduced, the size of the current loop is reduced. since the size of the current loop is the primary driver of inductance, an 0306 with a smaller current loop has significantly lower esl then an 0603. the reduction in esl varies by eia size, however, esl is typically reduced 60% or more with an licc versus a standard mlcc. avx licc products are available with a lead-free finish of plated nickel/tin. low inductance capacitors (rohs) 0612/0508/0306/0204 licc (low inductance chip capacitors) how to order mlcc licc 0.001 0.01 0.1 1 10 1 10 100 1000 frequency (mhz) impedance (ohm s ) licc_0612 mlcc_1206 0.001 0.01 0.1 1 10 1 10 100 1000 frequency (mhz) impedance (ohms) licc_0508 mlcc_0805 0612 size 0204 0306 0508 0612 z voltage 4 = 4v 6 = 6.3v z = 10v y = 16v 3 = 25v 5 = 50v d dielectric c = x7r d = x5r w = x6s z = x7s 105 capacitance code (in pf) 2 sig. digits + number of zeros m capacitance tolerance k = 10% m = 20% a failure rate a = n/a t terminations t = plated ni and sn 2 packaging available 2 = 7" reel 4 = 13" reel a* thickness thickness mm (in) 0.35 (0.014) 0.56 (0.022) 0.61 (0.024) 0.76 (0.030) 1.02 (0.040) 1.27 (0.050) typical impedance characteristics performance characteristics capacitance tolerances k = 10%; m = 20% operation x7r = -55c to +125c temperature range x5r = -55c to +85c x7s = -55c to +125c temperature coefficient x7r, x5r = 15%; x7s = 22% voltage ratings 4, 6.3, 10, 16, 25 vdc dissipation factor 4v, 6.3v = 6.5% max; 10v = 5.0% max; 16v = 3.5% max; 25v = 3.0% max insulation resistance 100,000m min, or 1,000m per (@+25c, rvdc) f min.,whichever is less note: contact factory for availability of termination and tolerance options for specific part numbers.
62 low inductance capacitors (rohs) 0612/0508/0306/0204 licc (low inductance chip capacitors) size 0204 0306 0508 0612 packaging embossed embossed embossed length mm 0.81 0.15 1.27 0.25 1.60 0.25 (in.) (0.032 0.006) (0.050 0.010) (0.063 0.010) width mm 1.60 0.15 2.00 0.25 3.20 0.25 (in.) (0.063 0.006) (0.080 0.010) (0.126 0.010) wvdc 4 6.3 10 16 4 6.3 10 16 25 50 6.3 10 16 25 50 6.3 10 16 25 50 cap 0.001 (f) 0.0022 0.0047 0.010 0.015 0.022 0.047 0.068 0.10 0.15 0.22 0.47 0.68 1.0 1.5 2.2 3.3 4.7 10 0306 code thickness a 0.61 (0.024) 0508 code thickness s 0.56 (0.022) v 0.76 (0.030) a 1.02 (0.040) 0612 code thickness s 0.56 (0.022) v 0.76 (0.030) w 1.02 (0.040) a 1.27 (0.050) solid = x7r = x5r = x7s mm (in.) 0204 code thickness c 0.35 (0.014) = x6s mm (in.) mm (in.) mm (in.) physical dimensions and pad layout w t t l lw t 0612 1.60 0.25 3.20 0.25 0.13 min. (0.063 0.010) (0.126 0.010) (0.005 min.) 0508 1.27 0.25 2.00 0.25 0.13 min. (0.050 0.010) (0.080 0.010) (0.005 min.) 0306 0.81 0.15 1.60 0.15 0.13 min. (0.032 0.006) (0.063 0.006) (0.005 min.) 0204 0.50 0.05 1.00 0.05 0.18 0.08 (0.020 0.002) (0.040 0.002) (0.007 0.003) physical chip dimensions mm (in) ? cc ? pad layout dimensions mm (in) abc 0612 0.76 (0.030) 3.05 (0.120) .635 (0.025) 0508 0.51 (0.020) 2.03 (0.080) 0.51 (0.020) 0306 0.31 (0.012) 1.52 (0.060) 0.51 (0.020) 0204 t - see range chart for thickness and codes
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